A Linux change log has hinted us towards an AMD Zeppelin CPU to have 32 Zen cores
A Linux change log has hinted us towards an AMD Zeppelin CPU to have 32 Zen cores
In an interesting post by New Citavia Blog confirms a codename we have been hearing about for a very long time: Zeppelin. If you haven’t heard of Zeppelin it’s a MCM (Multi Chip Module) which will utilize AMD’s own custom interconnect to combine 32 Zen cores. Not too terribly much is known about this CPU but multiple leaks have surfaced over the past couple of weeks.
The report in question has several lines of code published in a recent update by AMD which can be found at LKML:
AMD Zeppelin (Family 17h, Model 00h) introduces an instructions retired performance counter which indicated by CPUID.8000_0008H:EBX[1]. And dedicated Instructions Retired register (MSR 0xC000_000E9) increments on once for every instruction retired.
Signed-off-by: Huang Rui
—
arch/x86/include/asm/cpufeature.h | 1 +
arch/x86/include/asm/msr-index.h | 3 +++
arch/x86/kernel/cpu/perf_event_msr.c | 30 +++++++++++++++++++———–
3 files changed, 23 insertions(+), 11 deletions(-)
+ core_complex_id = (apicid & ((1 << c->x86_coreid_bits) – 1)) >> 3;
+ per_cpu(cpu_llc_id, cpu) = (socket_id << 3) | core_complex_id;
The code was signed by an AMD engineer confirms the name of the processor. The code present in this update also points to the expected 4 Zen core clusters and a total of 32 maximum CPUs which will be divided into core complexes consisting of 4 Zen cores each (8 logical cores thanks to SMT).
Based off of AMD’s press release today of their Q1 CPU and APU releases, we still have yet to see real Zen architecture introduced.
SOURCE: WCCFTech
