At Computex last week, AMD displayed an IHS that could be a fully functional Bulldozer APU code named ‘Trinity’. Details have now emerged that the APU to replace Llano in 2012, could be packing some serious punch with up to 2 billion transistors.
At Computex last week, AMD displayed an IHS that could be a fully functional Bulldozer APU code named ‘Trinity’. Details have now emerged that the APU to replace Llano in 2012, could be packing some serious punch with up to 2 billion transistors.
In 2012, AMD have promised to release a faster, more powerful APU to replace Llano. That APU is codenamed ‘Trinity’. Based on bulldozer architecture containing 2-4 cores (IE 1-2 modules?) and a next gen DX11 GPU that will exceed current performance levels of Llano, by how much is too early to tell but the primary aim was to publically announce that AMD has Bulldozer APUs doing the rounds in their R&D labs already.
Basic information concerning Trinity APUs
The new slide tells us that the Trinity APUs will have 1.6-2 billion transistors and even 8MB of L2 cache. (again no L3, but a HUGE amount of L2 not seen since Intel’s Core2Quad chips?)
Anything else is too early to speculate but we will eagerly await more information as it is announced.
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